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What we are building.

Nothing on this page is for sale yet. Each item shows the stage it has reached.

Heading to fabrication
Designed, simulated, and reviewed with our fabrication partner. Not yet made.
Planned
Defined in outline. The detailed design follows the Phase 1 results.
Research
A concept we are developing. Not part of the first test chip.

Phase 1 test chip

Heading to fabrication

The first chip is deliberately small. It is a four-channel programmable light processor, built to answer one question: does this platform work as well as the simulations say?

It is judged against three go/no-go tests. We move to Phase 2 only if it passes all three:

  1. Quantum interference: can two single photons meet on the chip and interfere as quantum physics predicts?
  2. Programming accuracy: when we ask for an operation, how close does the chip get?
  3. Stability: how far do the settings drift over time?

The chip also measures itself. Next to the processor it carries dozens of small test structures, each measuring a single property of the material and the manufacturing. One fabrication run tells us not only whether the processor works, but why.

4

light channels in the Phase 1 programmable test chip

Design

> 90 %

visibility when two single photons meet and interfere on the chip

TargetA go/no-go goal. Not yet measured.

< 1 %

error between the operation we ask for and the one the chip performs

TargetA go/no-go goal. Not yet measured.

< 5 mrad/min

drift of the settings over time, in milliradians per minute

TargetA go/no-go goal. Not yet measured.

Processor for quantum research labs

Planned

Phase 2 is a larger programmable processor aimed at quantum research labs, designed toward standard rack integration and running at room temperature.

One chip serves many experiments, reconfigured in software. Foundry selection follows the Phase 1 results.

Memory layer for light

Research

Today’s programmable photonic chips hold each setting by continuously heating a small part of the chip. That costs power, produces heat, and makes the chip drift as its temperature changes.

Our patent-pending memory layer is designed to hold settings at near-zero power, so the chip keeps its configuration without constant heating. The aim is processors that are more stable and lower-power, which matters when many chips share a rack.

It is not part of the first test chip. The first chip proves the processor platform the memory layer will sit on.

June 2026

UK patent application filed. Patent pending, not yet granted.

On record

Quantum data centers and classical optical processing

Research

The long-term aim: processors designed toward standard rack integration for quantum data centers, with stated power and footprint.

The same platform can also process light for classical optical computing.

Who it is for

TodayTomorrow
Quantum research labs that need a programmable, room-temperature optical circuit for photonic quantum experimentsQuantum data centers: processors designed toward standard rack integration, with stated power and footprint
University and national-lab groups working on quantum optics and photonic computingClassical optical processing on the same platform

Interested in early access or collaboration? We are speaking with research groups about testing and first applications.

Marks beside the figures on this page:

Design
A property of our chip design.
Target
What we are aiming for. Not yet achieved.
On record
A matter of public record.

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